The present invention relates generally to electronic devices and more particularly to improved trim circuitry and methods for trimming electrical devices before and/or after packaging.
Trim circuits are found in many types of electrical devices where a voltage, current, or other operational parameter of a device needs to be adjusted, either during or following manufacturing. Such trim circuitry typically provides a resistance between two nodes in an integrated circuit device, which may be selectively removed, in whole or in part, from the circuit upon application of voltages or currents to trim pads in the device. Trim circuits often employ zener diodes connected in parallel with the resistor to be removed, where the application of an appropriate trim voltage across the diode terminals short-circuits the resistor, sometimes referred to as xe2x80x9cblowingxe2x80x9d the diode. Other trim circuits selectively employ open-circuits to adjust the device performance. In this instance, fuses are often formed in the trim circuit, which can be selectively open circuited by conducting a fuse trim current through the fuse, sometimes referred to as xe2x80x9cblowingxe2x80x9d the fuse.
Resistive trim circuits are employed in a variety of electrical devices, including voltage reference or voltage regulator devices wherein one or more reference voltages generated by the device are adjusted during the manufacturing process. In the case of high precision reference voltage trimming, multiple trim cells are often employed to allow precise adjustment to the voltage of interest. This is commonly implemented by cascading a number of conventional parallel resistor/diode trim cells in series, with probe pads provided between each such trim cell to allow application of trim voltages to the individual cells. Thus, where N such trim cells are configured in series, N+1 pads are needed to allow selective access for trimming the individual cells. However, each probe pad occupies a significant amount of surface area in the device die, thereby limiting the area available for other devices. Thus, it is desirable to provide electrical devices having multi-bit trim circuitry occupying less overall real estate than the series configuration of multiple conventional trim cells.
In a typical trimming operation, pre-packaging probing is performed using test systems capable of probing conductive trim pads on the surface of the device die, either before or after separation of individual dies from a wafer. The test system measures the reference voltage and applies trim voltages to appropriate pairs of trim pads to selectively change the resistance affecting the reference voltage. The reference voltage is again measured, and if further trimming is desired, the process is repeated, with additional diodes being blown to remove further resistance and thereby provide further adjustment of the reference voltage. However, since packaged voltage regulator devices typically include only a small number of external pins or terminals (e.g., 3), mutli-bit trimming has thusfar been performed exclusively prior to packaging.
Electrical devices are commonly available in a wide variety of package sizes and types, for example, providing different footprint sizes and thermal cooling capabilities for both thru-hole and surface mount applications. In the case of voltage regulator devices, different package options are available, typically providing three terminals for an LM317 type regulator. However, the packaging process itself can cause changes in the device performance, which sometimes affects the reference voltage in a regulator device.
In this regard, the cooling of molding compound around the device die during packaging has been found to cause physical stress to the die and the components thereof. This stress in turn may cause a shift in an operational parameter in a device, such as the reference voltage value in a voltage regulator. In addition, the stress related reference voltage shift is different for different package types. Moreover, as device package sizes continue to decrease, the stress on the device dies increases. As a result, the stress-induced reference voltage shift is more pronounced. Accordingly, there is a need for trim circuits and methodologies allowing multi-bit trimming of voltage regulators and other electrical devices which compensate for stress-related changes in device performance.
The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention, and is neither intended to identify key or critical elements of the invention, nor to delineate the scope thereof. Rather, the primary purpose of the summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides methods and apparatus.for trimming electrical devices, which may be employed before or after device packaging. Thus, the invention may be employed to compensate for device performance changes resulting from packaging processes. In addition, the invention facilitates trimming of devices in multi-bit fashion, through application of one or more trim signals to a single pair of pads or terminals on the device. Thus, the trim apparatus of the invention provides multi-bit trimming while occupying less die space than prior multi-bit trimming circuitry. In one example illustrated and described below, a reference voltage in a three-terminal voltage regulator device may be adjusted through mutli-bit resistor trimming using an output terminal and an adjust terminal thereof after the device is packaged. Thus, the invention facilitates multi-bit adjustment to compensate for shifting in an operational parameter caused by packaging processes to improve the manufacturability of such devices with current packaging processes and materials.
One aspect of the invention provides an electrical device, comprising an electrical circuit with a plurality of electrical terminals or pins, and a trim circuit comprising one or more trim cells fabricated in the device substrate. The trim cells individually provide resistance between first and second nodes in the electrical circuit, where the resistance of the individual trim cells are selectively removable by application of a trim signal to first and second electrical terminals. In one implementation, application of a trim voltage to output and adjust pins or terminals of a voltage regulator device removes (e.g., short-circuits) a resistance from a trim cell nearest the adjust terminal. Subsequent application of a trim current to the output and adjust terminals disconnects the trim cell from the output terminal, to allow access to an adjacent trim cell in the trim circuit. The process may then be repeated if further resistance removal is desired, in order to bring the reference voltage within an acceptable range.
The trim cells individually comprise a resistor, providing a resistance between the first and second circuit nodes and a diode comprising an anode connected to an end of the resistor, a cathode, and a conductive portion connected to the cathode. The resistors of the individual trim cells are connected in series between the first and second circuit nodes, with the cathodes connected to the second trim terminal or pad. The first terminal is connected to the first circuit node, allowing access to the trim cells to trim one cell at a time, beginning with the trim cell closest to the first terminal. Application of a trim voltage across the terminals causes the conductive portion of the cell diode or that of an adjacent contact to electrically short-circuit the resistor. The trim cells may further comprise a fuse connected between the conductive portion of the diode and the second terminal to selectively disconnect the cathode from the second terminal after application of a trim current between terminals. This allows trimming of one cell at a time, with the trim voltage shorting the cell resistor, and the trim current disconnecting the trimmed cell from the second terminal, to allow trimming of the next cell, if desired.
Another aspect of the invention involves methods for selectively removing resistance between first and second nodes in a packaged electrical device. The methods may be employed in association with voltage regulators or other devices having first and second terminals associated with one or more trim cells in the device. The method comprises applying a trim voltage across the first and second terminals to short a first resistor, and applying a trim current between the first and second terminals to disconnect a first trim cell from the second terminal. The method may further comprise measuring an operating parameter associated with the electrical device, such as a reference voltage of a voltage regulator device, and determining if further trimming is desired according to the measured operating parameter. If further trimming is desired, the method provides for applying a second trim voltage across the terminals to short a second resistor, and applying a trim current between the terminals to disconnect a second trim cell from the second terminal.
To the accomplishment of the foregoing and related ends, the following description and annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative of but a few of the various ways in which the principles of the invention may be employed. Other aspects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.